In conventional semiconductor memories, programming is made in such a manner that, if there happens to be formed a defect in the memory cell of a particular address, a redundancy memory is used for that particular address by utilizing link fuses. The use of link fuses, however, can cause various problems.
FIG. 1 illustrates a conventional redundancy circuit, and FIG. 2 illustrates the constitution and operating principle of a link fuse. In a conventional redundancy circuit as shown in FIG. 1, spare rows and columns are used instead of the addresses of defective memory cells in the manner as described below. That is, the link fuses, which are connected to the drains of transistors so as to correspond to the defective addresses, are burned using a laser repair apparatus or by allowing an electrical overcurrent to flow through them, thereby cutting the fuses.
As shown in FIG. 2(A), the link fuse is constituted such that the following layers are formed upon silicon substrate Si-Sub in the indicated order: a thick oxide layer Fox, a polysilicon 2 or polycide layer, an LTO (low temperature oxidation) layer, and a PSG (phosphorus silicate glass) or BPSG (boron psg) layer.
FIG. 2(A) illustrates the structure before the programming, i.e., before the burning, and FIG. 2(B) illustrates the structure after the programming, i.e., after the burning.
Dotted line W of FIG. 2(B) illustrates a case in which the fuse link is not cut off due to insufficiency of the intensity of the laser beam or positional inaccuracy of the laser apparatus, on the one hand, and dotted line U illustrates a case in which silicon substrate Si-Sub is damaged due to excessive burning, on the other hand.
The conventional redundancy circuit of a semiconductor memory using address suppression will be described below with reference to FIG. 1.
A signal SPAREENB stays in a "0" state during operation. When the programming has not been performed, one of the two transistors of each transistor pair, which are connected respectively to the pairs of A.sub.0 and A.sub.0, A.sub.1 and A.sub.1, . . . A.sub.n and A.sub.n, remains in a turned-on state. That is, n+1 transistors among the 2(n+1) transistors, which includes all of the transistors with fuse links connected thereto, are always in a turned-on state, so that the voltage on line B stays at a "0" level.
In such a circuit constituted as described above, the method of programming so that a particular defective address, e.g., addresses "A.sub.0, A.sub.1, . . . A.sub.n ", corresponding to "0, 1, . . . 1", is replaced with the redundancy circuit of FIG. 1, is carried out in the manner described below. That is, programming is carried out by burning link fuses which are connected, respectively, to the drains of NMOS transistors, which are in turn connected, respectively, to addresses A.sub.0, A.sub.1, . . . A.sub.n.
If the programming is carried out in the above described manner, the voltage on line B is shifted to a "1" state only when the addresses correspond, for example, to "0, 1, . . . 1", while the voltage on line B stays in a "0" state otherwise. The main decoder connected to the original memory cell array is not operated in a "1" state of the spare signal on line B, but is operated in a "0" state of the spare signal on line B. If the spare signal on line B is shifted to a "1" state, the spare rows and columns are activated so that the spare rows and columns are able to store and output signals instead of the original rows and columns.
In the above described conventional redundancy circuit, in order to cut off the link fuses, a special laser repair apparatus or high current circuit is required. In procuring, maintaining and using the apparatus or circuit, higher costs are incurred, and further, frequent failures occur in cutting off the link fuses due to positional inaccuracy or variation of the uniformness of the intensity of the laser beam, with the result that defects are formed in the memory devices. Further, if the cutting power is too high, leakage current flows from the link fuse to the silicon substrate, or debris from the burnt fuse flies to other portions of the circuit, thereby forming defects in the memory devices.